Wireless standards are used extensively in convolutional codes and turbo codes. Decoding processes for the codes were originally proposed by A. J. Viterbi in the late 1960's and by C. Berrou, A. Glavieux and P. Thitimajshima in 1993. The decoding processes of Viterbi and Berrou et al. have been adopted in many communications standards such as Wideband-CDMA (i.e., WCDMA), Code Division Multiple Access 2000 (i.e., CDMA2000), Worldwide Interoperability for Microwave Access (i.e., WiMAX), Long Term Evolution (i.e., LTE) and Digital Video Broadcasting-Return Channel via Satellite (i.e., DVB-RCS). The codes allow near optimal decoding with excellent performance approaching the Shannon limit for additive white gaussian noise (i.e., AWGN) channels. Therefore, high-speed and low-area architectures for multistandard convolutional and turbo decoders are of practical importance.
The convolutional codes are used for transferring code words of a small size while turbo codes are used for long code words. Widely used techniques for decoding convolutional codes and turbo codes are a Viterbi technique and a logarithm-maximum a posteriori (i.e., Log-MAP) technique respectively. If high speed decoding is specified, the Viterbi and Log-MAP techniques are expensive in terms of the number of arithmetic operations computed in each clock cycle. Currently, no known substitutions exist for the Log-MAP and the Viterbi techniques that could provide comparable quality for decoding. At the same time, implementations of the Log-MAP and Viterbi decoding techniques differ from each other. Therefore, sharing common hardware for the two techniques in a decoder design is difficult. Because of the above problems, universal decoders that support both turbo codes and convolutional codes often contain a sub-scheme for the turbo decoder and another sub-scheme for the convolutional decoder. Usually only memory is shared between the sub-decoders. A disadvantage of such solutions is that a large silicon area is consumed to implement both sub-decoders.
Different wireless standards use different types of turbo and convolutional codes. For example, the WiMAX standard uses duo-binary turbo codes while the LTE standard uses single-binary versions. The decoding procedures for the different standards differ from each other. Thus, decoding of the WiMAX duo-binary turbo codes is usually done with a radix-4 modification of the Log-MAP technique while the LTE turbo codes are usually decoded with a radix-2 modification of the Log-MAP technique. Other differences between the turbo codes and the convolutional codes are also present in different wireless standards. From such a point of view, trivial solutions for high-speed multistandard decoders for both turbo codes and convolutional codes would contain different sub-decoders for each of the different types of codes. Such solutions would have a large silicon area.
Throughput of the decoders are designed to match high data transfer rates of the wireless devices. Some features of common decoding techniques used for the convolutional codes and the turbo codes make the decoder demanding in terms of computing power. Consequently, the area of the conventional high speed convolutional decoders and the turbo decoders becomes large. Moreover, different wireless standards use different types of convolutional codes and turbo codes that make the area of the multistandard decoders even larger.
It would be desirable to implement a parallel decoder for multiple wireless standards.